1. Technical Field
The present invention relates to a semiconductor device, and more particularly, to a stack module in which unit substrates are stacked, a card including the stack module, and a system including the stack module.
2. Description of the Related Art
As integration of semiconductor products increases, stacked structures of a plurality of semiconductor packages or a plurality of semiconductor chips are increasingly being utilized. In stacked structures, semiconductor packages or semiconductor chips are electrically connected, and thus, can be selectively or commonly accessed using an external terminal.
For example, JP 2001-024151 discloses a semiconductor device in which a plurality of chips are stacked. Those chips can be connected using surface-select pads, rear surface-select pads, and vias.
Japanese Patent Application No. hei6-342874 discloses a stack package. Specifically, a plurality of packages are stacked, and, in each package, surface interconnection lines and rear interconnection lines are disposed so as to be shifted by two pitch lengths from each other.
However, with respect to the stack structures described above, it is very difficult and expensive to form pads or interconnections on both surfaces of a semiconductor chip. Particularly, when a semiconductor chip is warped, due to thermal transients for example, the reliability of the connection between a surface pad and a rear pad can decrease. In addition, to ensure that surface and rear interconnection lines are shifted toward each other, vias should be slanted in semiconductor packages, which may make the manufacturing process more complex.